1. Field of the Invention
The invention relates to clock recovery circuit, and more particularly to a clock recovery circuit capable of automatically adjusting the frequency range of a VCO (Voltage Controlled Oscillator) in the circuit without needing a look-up-table.
2. Description of the Related Art
Typically, an optical disk drive operates an optical disk at a constant angular velocity, so the linear speeds at the inner tracks and outer tracks of the optical disk are different. In this case, the frequencies of a reference clock to read the EFM (Eight-To-Fourteen Modulation) signal at different tracks for the optical disk drive are also different. In order to correctly read the information on different tracks of the optical disk, the optical disk drive must utilize a clock recovery circuit (or a phase locked loop) to generate a reference clock in synchronization with the EFM signal.
FIG. 1 shows a typical EFM clock recovery circuit. The clock recovery circuit 100 includes a phase detector 101, a frequency detector 102, a charge pump 103 for receiving the output signal PDO of the phase detector 101 and the output signal FDO of the frequency detector 102, a loop filter 104 connected to the charge pump 103, a voltage controlled oscillator (hereinafter referred as VCO) 105 for receiving a fine control voltage VT outputted from the loop filter 104, and a frequency divider 106 for generating the reference clock FCO by dividing the frequency of the oscillation clock outputted from the VCO 105. In the clock recovery circuit 100, the functions of the phase detector 101, the frequency detector 102, the charge pump 103, the loop filter 104, the VCO 105 and the frequency divider 106 are the same as those of the typical phase locked loop, and detailed descriptions thereof will be omitted. In addition to the above-mentioned components, the clock recovery circuit 100 further includes a counter 107 for generating a frequency value of the reference clock FCO, a control unit 108, and a DAC (Digital to Analog Converter) 109. The counter 107 counts the frequency of the reference clock FCO outputted from the frequency divider 106, and generates the frequency value FV to the control unit 108. The control unit 108 chooses a control value from a look-up-table according to the frequency value FV. The DAC 109 converts the control value into an analog coarse control voltage RVT to control the frequency range of the VCO 105.
In this clock recovery circuit 100, however, the control unit 108 thereof has to create a look-up-table, as shown in FIG. 2. That is, the relationship between the central frequency of the frequency range of the VCO (i.e., FRi, i=1˜9) and the coarse control voltage RVT has to be determined in advance. Based on the preset look-up-table, a central frequency closest to the reference clock FCO is picked, and the corresponding coarse control voltage in the table is fed to the DAC 109 so as to set the coarse control voltage RVT to adjust the frequency range of the VCO 105.